LU, Zhonghai - HKUST Class Schedule & Quota

Class Schedule & Quota
2026-27 Fall 2025-26 Summer 2025-26 Spring 2025-26 Winter
2026-27 Fall
Common Core Course
The class information on this page will normally be updated every 15 to 20 minutes during class enrollment period.
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COURSE INFO

DESCRIPTION	The course focuses on the communication problem of on-chip many-core architectures. It introduces basic concepts and principles of on-chip bus and interconnection network, in particular, about network topology, routing and flow control, deadlock/livelock, and quality-of-service (QoS) et cetera. It presents the micro-architecture details of on-chip router and network interface designs for both message passing and shared memory systems. Furthermore, theoretical and experimental performance evaluation methodology will be investigated.

DESCRIPTION

The course focuses on the communication problem of on-chip many-core architectures. It introduces basic concepts and principles of on-chip bus and interconnection network, in particular, about network topology, routing and flow control, deadlock/livelock, and quality-of-service (QoS) et cetera. It presents the micro-architecture details of on-chip router and network interface designs for both message passing and shared memory systems. Furthermore, theoretical and experimental performance evaluation methodology will be investigated.

MICS 6002I - Network on Chip (3 units)

Section	Date & Time	Room	Instructor	Quota	Enrol	Avail	Wait	Remarks
L01 (6151)	01-SEP-2026 - 29-OCT-2026 Fr 01:30PM - 04:20PM	Rm 202, W2	LU, Zhonghai	20	12	8	0	> There will be no class scheduled for week 8 on October 30th, 2026. The time for the make-up session will be announced in class.
L01 (6151)	31-OCT-2026 - 07-DEC-2026 Fr 01:30PM - 04:20PM	Rm 202, W2	LU, Zhonghai	20	12	8	0